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7409 Quad Two input AND, Open collector in Pakistan
7409 Quad Two input AND, Open collector in Pakistan
7409 Quad Two input AND, Open collector in Pakistan
Packing list:
- 1x 7409 Quad Two input AND, Open collector
Related products
- 74LS And 74HC Series IC
74238 SN74HC238N 74HC238 74LS238 DIP 16 Pin IC in Pakistan
0 out of 5(0)These are high-speed silicon-gate CMOS decoders well suited to memory address decoding or data-routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low-power Schottky TTL logic. Both circuits have three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC/HCT138 series goes low or which of the normally low outputs of the HC/HCT238 series go high. Two active low and one active high enables (E1, E2, and E3)are provided to ease the cascading of decoders. The decoder’s eight outputs can drive ten low-power Schottky TTL equivalent loads.
SKU: D2021 - 74LS And 74HC Series IC
7447 74HC47 74LS47 BCD to 7 Segment Decoder Driver DIP 16 in Pakistan
Quick View74LS And 74HC Series IC7447 74HC47 74LS47 BCD to 7 Segment Decoder Driver DIP 16 in Pakistan
0 out of 5(0)74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the data with seven AND/OR gates having open-collector outputs to drive indicator segments directly. Each segment output is guaranteed to sink 24 mA in the ON (LOW) state and withstand 15V in the OFF (HIGH) state with a maximum leakage current of 250 µA. Auxiliary inputs provided blanking, 74LS47 BCD to 7-Segment Decoder/Driver IC.
SKU: D2008 - 74LS And 74HC Series IC
74HC165 Parallel To Serial 8 Bit Shift Register IC in Pakistan
0 out of 5(0)The 74HC165 is a high-speed Si-gate CMOS device and is pin-compatible with low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC165 are 8-bit parallel-load or serial-in shift registers with complementary serial outputs (Q7 and Q7) available from the last stage. When the parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the register asynchronously. When PL is HIGH, data enters the register serially at the Ds input and shifts one place to the right (Q0 –> Q1 –> Q2, etc.) with each positive-going clock transition. This feature allows parallel-to-serial converter expansion by tying the Q7 output to the DS input of the succeeding stage. The clock input is a gated-OR structure that allows one input to be used as an active LOW clock enable (CE) input. The pin assignment for the CP and CE inputs is arbitrary and can be reversed for layout convenience. The LOW-to-HIGH transition of input CE should only take place while CP is HIGH for predictable operation. Either the CP or the CE should be HIGH before the LOW-to-HIGH transition of PL to prevent shifting the data when PL is activated.
SKU: D2016 - 74LS And 74HC Series IC
74HC157 Quad 2×1 Multiplexer MUX DIP IC SN74LS157N 74157 74-LS157 in Pakistan
Quick View74LS And 74HC Series IC74HC157 Quad 2×1 Multiplexer MUX DIP IC SN74LS157N 74157 74-LS157 in Pakistan
0 out of 5(0)74HC157 is a high-speed multiplexer integrated circuit consisting of four 2-input digital multiplexers inside the chip. It is pin-compatible with Low-power Schottky TTL. It has two control inputs namely enable and select input. Additionally, it has two groups of registers. The selected input determines the register from which the data comes. Its operation is specified over a temperature range of -55 °C to 125 °C.
SKU: D2001 - 74LS And 74HC Series IC
NAND GATES IC 74HC00 Nand IC 7400 74LS00 in Pakistan
0 out of 5(0)The NAND GATES IC 74HC00 Nand IC 7400 74LS00 provides four independent 2-input NAND gates with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 6.0V.
SKU: D2003
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