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NAND Gate CD4011 IC CMOS Quad 2 Input NAND Gate In Pakistan

CD4011BE IC CMOS Quad 2 Input NAND Gate is a logic gate that produces an output that is false only if all its inputs are true. CD4011BE IC CMOS Quad 2 Input NAND Gate are NAND gates that provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix).

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CD4011BE IC CMOS Quad 2 Input NAND Gate is a logic gate that produces an output that is false only if all its inputs are true. CD4011BE IC CMOS Quad 2 Input NAND Gate are NAND gates that provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix).

Features of CD4011BE IC CMOS Quad 2 Input NAND Gate:

  1. Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V
  2. Buffered inputs and outputs
  3. Standardized symmetrical output characteristics
  4. The maximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C
  5. 100% tested for quiescent current at 20 V
  6. 5-V, 10-V, and 15-V parametric ratings
  7. Noise margin (over full package temperature range:
    1 V at VDD = 5 V
    2 V at VDD = 10 V
    2.5 at VDD = 15 V
  8. Meets all requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of “B” Series CMOS Devices”

Specifications of CD4011BE IC CMOS Quad 2 Input NAND Gate:

DescriptionValue
Lead FinishGold
Logic FunctionNAND
Maximum Operating Supply Voltage18 V
Maximum Propagation Delay Time @ Maximum CL250@5V|120@10V|90@15V ns
Maximum Quiescent Current5 uA
Minimum Operating Supply Voltage3 V
MountingThrough Hole
Operating Temperature-55 to 125 °C
Pin Count14
Product Dimensions19.05 x 6.35 x 3.3 mm
Supplier PackagePDIP
Typical Quiescent Current0.02 uA

NAND Gate CD4011 IC CMOS Quad 2 Input NAND Gate In Pakistan

 

 

NAND Gate CD4011 IC CMOS Quad 2 Input NAND Gate In Pakistan

 

Package Include:

  • 1x CD4011BE NAND Gate
SKU: D2141 Category:

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