7428 Quad Two input NOR in Pakistan

The 74LS138 is a 3:8 Decoder IC that is commonly used in decoding or de-multiplexing circuits for memory decoding or data routing purposes. It is designed for high-speed operations and has three enable pins to make it easier to cascade with other ICs. The device decodes 1-of-8 lines, set by x3 binary select inputs & three enable inputs. The LS138 can be used as an 8- output demultiplexer by using one active LOW Enable input as data input & the other Enable inputs as strobes. The IC has an operating voltage from 1.0V to 5.5V with a low power consumption of 32mW. The propagation delay is around 21nS.

74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the data with seven AND/OR gates having open-collector outputs to drive indicator segments directly. Each segment output is guaranteed to sink 24 mA in the ON (LOW) state and withstand 15V in the OFF (HIGH) state with a maximum leakage current of 250 µA. Auxiliary inputs provided blanking, 74LS47 BCD to 7-Segment Decoder/Driver IC.

The 74LS189 is a high-speed 64-bit RAM organized as a 16-word by the 4-bit array. Address inputs are buffered to minimize loading and are fully decoded on-chip. The outputs are 3-state and are in the high impedance state whenever the Chip Select (CS) input is HIGH. The outputs are active only in the read mode and the output data is the complement of the stored data.