74LS21 DUAL 4-INPUT AND GATE in Pakistan
74LS21 DUAL 4-INPUT AND GATE in Pakistan
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- 74LS And 74HC Series IC
7448 BCD To 7 Segment Decoder Driver IC 74LS48 SN74LS48N 74HC48 in Pakistan
Quick View74LS And 74HC Series IC7448 BCD To 7 Segment Decoder Driver IC 74LS48 SN74LS48N 74HC48 in Pakistan
0 out of 5(0)The 74LS48 features active-high outputs for driving lamp buffers or common-cathode LEDs. They have full ripple-blanking input/output controls and a lamp test input. Display patterns for BCD input count above 9 are unique symbols to authenticate input conditions. Their circuits incorporate automatic leading and/or trailing-edge zero-blanking control (RBI\ and RBO\). Lamp test (LT\) of these types may be performed at any time when the BI\/RBO\ node is at a high level. They contain an overriding blanking input (BI\), which can be used to control the lamp intensity by pulsing or to inhibit the outputs. Inputs and outputs are entirely compatible for use with TTL logic outputs.
SKU: D2010 - 74LS And 74HC Series IC
SMD 74HC595 74HC595D SOP16 Patch 8 Bit Serial Shift Register in Pakistan
Quick View74LS And 74HC Series ICSMD 74HC595 74HC595D SOP16 Patch 8 Bit Serial Shift Register in Pakistan
0 out of 5(0)74HC595 8-bit Serial-to-Parallel Shift Register is a high-speed shift register that utilizes advanced silicon-gate CMOS technology. This device possesses the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads.
This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has 8 3-STATE outputs. Separate clocks are provided for both the shift register and the storage register.
The shift register has direct-overriding clear, serial input, and serial output (standard) pins for cascading. Both the shift register and storage register use positive-edge triggered clocks. If both clocks are connected together, the shift register state will always be one clock pulse ahead of the storage register.
The 74HC logic family is speed, function, and pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
SKU: D2013 - 74LS And 74HC Series IC
74LS32 74-LS32 74HC32 7432 Quad 2 Input OR Gate DIP IC SN74CH32N in Pakistan
Quick View74LS And 74HC Series IC74LS32 74-LS32 74HC32 7432 Quad 2 Input OR Gate DIP IC SN74CH32N in Pakistan
0 out of 5(0)This device contains four independent gates each of which performs the logic OR function. The 74LS32 is a 14-Pin Quad 2-Input OR Gate IC. The 74LS32 provides four independent 2-input OR gates with standard push-pull outputs. Featured by Sharvi Electronics The device is designed for operation with a power supply range of 2.0V to 6.0V. Inputs include clamp diodes. This enables the use of current-limiting resistors to interface inputs to voltages in excess of VCC.
SKU: D2000 - 74LS And 74HC Series IC
74HC157 Quad 2×1 Multiplexer MUX DIP IC SN74LS157N 74157 74-LS157 in Pakistan
Quick View74LS And 74HC Series IC74HC157 Quad 2×1 Multiplexer MUX DIP IC SN74LS157N 74157 74-LS157 in Pakistan
0 out of 5(0)74HC157 is a high-speed multiplexer integrated circuit consisting of four 2-input digital multiplexers inside the chip. It is pin-compatible with Low-power Schottky TTL. It has two control inputs namely enable and select input. Additionally, it has two groups of registers. The selected input determines the register from which the data comes. Its operation is specified over a temperature range of -55 °C to 125 °C.
SKU: D2001 - 74LS And 74HC Series IC
74193 Synchronous 4 Bit Binary Counter DIP IC SN74LS193N 74HC193 in Pakistan
Quick View74LS And 74HC Series IC74193 Synchronous 4 Bit Binary Counter DIP IC SN74LS193N 74HC193 in Pakistan
0 out of 5(0)This circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change together when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four master-slave flip-flops are triggered by a low-to-high level transition of either count (clock) input. The direction of counting is determined by which count input is pulsed while the other count input is held high. The counter is fully programmable; that is, each output may be preset to either level by entering the desired data at the inputs while the load input is low. The output will change independently of the count pulses.
SKU: D2015
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