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74LS02 74AHS02 7402 Quad 2-input NOR gate in Pakistan
74LS02 74AHS02 7402 Quad 2-input NOR gate in Pakistan
74LS02 74AHS02 7402 Quad 2-input NOR gate in Pakistan
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- 1 x 74LS02 74AHS02 7402 Quad 2-input NOR gate in Pakistan
Related products
- 74LS And 74HC Series IC
7490 74LS90 IC Decade Counter in Pakistan
0 out of 5(0)Each counter has a divide-by-two section and either a divide-by-five (LS90), divide-by-six (LS92) or divide-by-eight (LS93) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP) to form BCD, bi-quinary, modulo-12, or modulo-16 counters. All of the counters have a 2-input gated Master Reset (Clear), and the LS90 also has a 2-input gated Master Set (Preset 9).
SKU: D2012 - 74LS And 74HC Series IC
7448 BCD To 7 Segment Decoder Driver IC 74LS48 SN74LS48N 74HC48 in Pakistan
Quick View74LS And 74HC Series IC7448 BCD To 7 Segment Decoder Driver IC 74LS48 SN74LS48N 74HC48 in Pakistan
0 out of 5(0)The 74LS48 features active-high outputs for driving lamp buffers or common-cathode LEDs. They have full ripple-blanking input/output controls and a lamp test input. Display patterns for BCD input count above 9 are unique symbols to authenticate input conditions. Their circuits incorporate automatic leading and/or trailing-edge zero-blanking control (RBI\ and RBO\). Lamp test (LT\) of these types may be performed at any time when the BI\/RBO\ node is at a high level. They contain an overriding blanking input (BI\), which can be used to control the lamp intensity by pulsing or to inhibit the outputs. Inputs and outputs are entirely compatible for use with TTL logic outputs.
SKU: D2010 - 74LS And 74HC Series IC
74193 Synchronous 4 Bit Binary Counter DIP IC SN74LS193N 74HC193 in Pakistan
Quick View74LS And 74HC Series IC74193 Synchronous 4 Bit Binary Counter DIP IC SN74LS193N 74HC193 in Pakistan
0 out of 5(0)This circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change together when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four master-slave flip-flops are triggered by a low-to-high level transition of either count (clock) input. The direction of counting is determined by which count input is pulsed while the other count input is held high. The counter is fully programmable; that is, each output may be preset to either level by entering the desired data at the inputs while the load input is low. The output will change independently of the count pulses.
SKU: D2015
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